libnds
|
nds interrupt support. More...
#include <nds/ndstypes.h>
Macros | |
#define | INTR_WAIT_FLAGS *(__irq_flags) |
BIOS register used by swiIntrWait() and swiWaitForVBlank(). | |
#define | INTR_WAIT_FLAGSAUX *(__irq_flagsaux) |
BIOS register used by swiIntrWait() in the ARM7 in DSi mode. | |
#define | IRQ_AES BIT(12) |
AES interrupt mask (DSi ARM7) | |
#define | IRQ_ALL (~0) |
Mask for all interrupts. | |
#define | IRQ_CAMERA BIT(25) |
Camera interrupt mask (DSi ARM9) | |
#define | IRQ_CARD BIT(19) |
interrupt mask DS Card Slot | |
#define | IRQ_CARD_LINE BIT(20) |
interrupt mask | |
#define | IRQ_CART BIT(13) |
GBA cartridge interrupt mask. | |
#define | IRQ_DMA(n) (1 << ((n) + 8)) |
Returns the interrupt mask for a given DMA channel. | |
#define | IRQ_DMA0 BIT(8) |
DMA 0 interrupt mask. | |
#define | IRQ_DMA1 BIT(9) |
DMA 1 interrupt mask. | |
#define | IRQ_DMA2 BIT(10) |
DMA 2 interrupt mask. | |
#define | IRQ_DMA3 BIT(11) |
DMA 3 interrupt mask. | |
#define | IRQ_DSP BIT(24) |
DSP interrupt mask (DSi ARM9) | |
#define | IRQ_FIFO_EMPTY BIT(17) |
Send FIFO empty interrupt mask. | |
#define | IRQ_FIFO_NOT_EMPTY BIT(18) |
Receive FIFO not empty interrupt mask. | |
#define | IRQ_GEOMETRY_FIFO BIT(21) |
Geometry FIFO interrupt mask (ARM9) | |
#define | IRQ_HANDLER *(__irq_vector) |
BIOS register that contains the address of the global interrupt handler. | |
#define | IRQ_HBLANK BIT(1) |
Horizontal blank interrupt mask. | |
#define | IRQ_HEADPHONE BIT(5) |
Headphone interrupt mask (DSi ARM7) | |
#define | IRQ_I2C BIT(6) |
I2C interrupt mask (DSi ARM7) | |
#define | IRQ_IPC_SYNC BIT(16) |
IPC sync interrupt mask. | |
#define | IRQ_KEYS BIT(12) |
Keypad interrupt mask. | |
#define | IRQ_LID BIT(22) |
Hinge open interrupt mask. | |
#define | IRQ_MICEXT BIT(14) |
microphone interrupt mask (DSi ARM7) | |
#define | IRQ_NDMA(n) (1 << ((n) + 28)) |
Returns the interrupt mask for a given NDMA channel (DSi only). | |
#define | IRQ_NDMA0 BIT(28) |
NDMA 0 interrupt mask (DSi) | |
#define | IRQ_NDMA1 BIT(29) |
NDMA 1 interrupt mask (DSi) | |
#define | IRQ_NDMA2 BIT(30) |
NDMA 2 interrupt mask (DSi) | |
#define | IRQ_NDMA3 BIT(31) |
NDMA 3 interrupt mask (DSi) | |
#define | IRQ_NETWORK BIT(7) |
Serial/RTC interrupt mask (ARM7) (deprecated name) | |
#define | IRQ_RTC BIT(7) |
Serial/RTC interrupt mask (ARM7) | |
#define | IRQ_SD_DATA BIT(9) |
SD/MMC data interrupt mask (DSi ARM7) | |
#define | IRQ_SDIO BIT(10) |
SDIO controller interrupt mask (DSi ARM7) | |
#define | IRQ_SDIO_DATA BIT(11) |
SDIO data interrupt mask (DSi ARM7) | |
#define | IRQ_SDMMC BIT(8) |
SD/MMC controller interrupt mask (DSi ARM7) | |
#define | IRQ_SPI BIT(23) |
SPI interrupt mask. | |
#define | IRQ_TIMER(n) (1 << ((n) + 3)) |
Returns the interrupt mask for a given timer. | |
#define | IRQ_TIMER0 BIT(3) |
Timer 0 interrupt mask. | |
#define | IRQ_TIMER1 BIT(4) |
Timer 1 interrupt mask. | |
#define | IRQ_TIMER2 BIT(5) |
Timer 2 interrupt mask. | |
#define | IRQ_TIMER3 BIT(6) |
Timer 3 interrupt mask. | |
#define | IRQ_VBLANK BIT(0) |
Vertical blank interrupt mask. | |
#define | IRQ_VCOUNT BIT(2) |
Vcount match interrupt mask. | |
#define | IRQ_WIFI BIT(24) |
WIFI interrupt mask (ARM7) | |
#define | MAX_INTERRUPTS 32 |
Maximum number of interrupts. | |
#define | MAX_INTERRUPTS_AUX 15 |
Maximum number of ARM7 interrupts in DSi mode (REG_AUXIE and REG_AUXIF). | |
#define | REG_AUXIE (*(vuint32 *)0x04000218) |
Auxiliary Interrupt Enable register. | |
#define | REG_AUXIF (*(vuint32 *)0x0400021C) |
Auxiliary Interrupt Flag register. | |
#define | REG_IE (*(vuint32 *)0x04000210) |
Interrupt Enable register. | |
#define | REG_IF (*(vuint32 *)0x04000214) |
Interrupt Flag register. | |
#define | REG_IME (*(vuint32 *)0x04000208) |
Interrupt Master Enable Register. | |
Enumerations | |
enum | IME_VALUE { IME_DISABLE = 0 , IME_ENABLE = 1 } |
Values allowed for REG_IME. More... | |
Functions | |
static int | enterCriticalSection (void) |
Disable interrupts by setting IME to 0. | |
void | irqClear (u32 irq) |
Remove the handler associated with the interrupt mask IRQ. | |
void | irqDisable (u32 irq) |
Prevent the given interrupt from occuring. | |
void | irqEnable (u32 irq) |
Allow the given interrupt to occur. | |
void | irqInit (void) |
Initialise the libnds interrupt system. | |
void | irqInitHandler (VoidFn handler) |
Install a user interrupt dispatcher. | |
void | irqSet (u32 irq, VoidFn handler) |
Add a handler for the given interrupt mask. | |
static void | leaveCriticalSection (int oldIME) |
Leaves a critical section by restoring IME to its previous value. | |
VoidFn | setPowerButtonCB (VoidFn CB) |
Set callback for DSi Powerbutton press. | |
void | swiIntrWait (u32 waitForSet, uint32_t flags) |
Wait for interrupt(s) to occur. | |
void | swiWaitForVBlank (void) |
Waits for a vertical blank interrupt. | |
nds interrupt support.
#define IRQ_DMA | ( | n | ) | (1 << ((n) + 8)) |
Returns the interrupt mask for a given DMA channel.
n | DMA channel. |
#define IRQ_NDMA | ( | n | ) | (1 << ((n) + 28)) |
Returns the interrupt mask for a given NDMA channel (DSi only).
n | NDMA channel. |
#define IRQ_TIMER | ( | n | ) | (1 << ((n) + 3)) |
Returns the interrupt mask for a given timer.
n | Timer index. |
#define REG_AUXIE (*(vuint32 *)0x04000218) |
Auxiliary Interrupt Enable register.
Like REG_IE, but only available in the ARM7 in DSi mode.
#define REG_AUXIF (*(vuint32 *)0x0400021C) |
Auxiliary Interrupt Flag register.
Like REG_IF, but only available in the ARM7 in DSi mode.
#define REG_IE (*(vuint32 *)0x04000210) |
Interrupt Enable register.
This is the activation mask for the internal interrupts. Unless the corresponding bit is set, the IRQ will be masked out.
#define REG_IF (*(vuint32 *)0x04000214) |
Interrupt Flag register.
Since there is only one hardware interrupt vector, the IF register contains flags to indicate when a particular of interrupt has occured. To acknowledge processing interrupts, set IF to the value of the interrupt handled.
#define REG_IME (*(vuint32 *)0x04000208) |
Interrupt Master Enable Register.
When bit 0 is clear, all interrupts are masked. When it is 1, interrupts will occur if not masked out in REG_IE.
enum IME_VALUE |
|
inlinestatic |
Disable interrupts by setting IME to 0.
This is meant to be used with leaveCriticalSection():
void irqClear | ( | u32 | irq | ) |
Remove the handler associated with the interrupt mask IRQ.
irq | Mask associated with the interrupt. |
void irqDisable | ( | u32 | irq | ) |
Prevent the given interrupt from occuring.
irq | The set of interrupt masks to disable. |
void irqEnable | ( | u32 | irq | ) |
Allow the given interrupt to occur.
irq | The set of interrupt masks to enable. |
void irqInit | ( | void | ) |
Initialise the libnds interrupt system.
This function is called internally (prior to main()) to set up IRQs on the ARM9. It must be called on the ARM7 prior to installing IRQ handlers.
void irqInitHandler | ( | VoidFn | handler | ) |
Install a user interrupt dispatcher.
This function installs the main interrupt function, all interrupts are serviced through this routine. For most purposes, the libnds interrupt dispacther should be used in preference to user code unless you know exactly what you're doing.
handler | Address of the function to use as an interrupt dispatcher. |
Add a handler for the given interrupt mask.
Specify the handler to use for the given interrupt. This only works with the default interrupt handler, do not mix the use of this routine with a user-installed IRQ handler.
irq | Mask associated with the interrupt. |
handler | Address of the function to use as an interrupt service routine |
|
inlinestatic |
Leaves a critical section by restoring IME to its previous value.
oldIME | Value obtained from enterCriticalSection(). |
Set callback for DSi Powerbutton press.
CB | Function to call when power button pressed |
void swiIntrWait | ( | u32 | waitForSet, |
uint32_t | flags | ||
) |
Wait for interrupt(s) to occur.
waitForSet | 0: Return if the interrupt has already occured; 1: Wait until the interrupt has been set since the call |
flags | Interrupt mask to wait for. |
void swiWaitForVBlank | ( | void | ) |
Waits for a vertical blank interrupt.